@book{
183-1744619158,
title = {Prozessorentwurf mit Verilog HDL: Modellierung und Synthese von Prozessormodellen},
author = {Wecker, Dieter},
address = {Berlin},
publisher = {De Gruyter Oldenbourg},
address = {},
publisher = {},
year = {2021},
isbn = {9783110717822},
isbn = {3110717824},
language = {German},
note = {Literaturverzeichnis Seite [323]},
url = {https://www.degruyter.com/books/9783110717822},
url = {https://www.gbv.de/dms/tib-ub-hannover/1744619158.pdf},
url = {https://katalog.fid-bbi.de/Record/183-1744619158}
}